BPI-EAI80 AI board - Revision history

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2020-04-18T03:41:34Z

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Sinovoip at 03:37, 18 April 2020

2020-04-18T03:37:16Z

Sinovoip at 03:35, 18 April 2020

2020-04-18T03:35:32Z

Sinovoip at 03:30, 18 April 2020

2020-04-18T03:30:27Z

Sinovoip at 03:04, 18 April 2020

2020-04-18T03:04:09Z

Sinovoip at 03:03, 18 April 2020

2020-04-18T03:03:10Z

Sinovoip at 03:01, 18 April 2020

2020-04-18T03:01:43Z

Sinovoip at 03:00, 18 April 2020

2020-04-18T03:00:40Z

Sinovoip at 03:00, 18 April 2020

2020-04-18T03:00:09Z

Sinovoip: Created page with "= Introduction= BPI-EAI80 AI board Gree EAI80 chip design BPI-EAI80 AI board Kendryte K210 RISC-V File:Webduino_gif.g..."

2020-04-18T02:58:43Z

Created page with "= Introduction= thumb|BPI-EAI80 AI board Gree EAI80 chip design thumb|BPI-EAI80 AI board Kendryte K210 RISC-V File:Webduino_gif.g..."

New page

← Older revision		Revision as of 03:41, 18 April 2020
Line 1:		Line 1:
−	~~= Introduction=~~
−	~~[[File:Banana_PI_BPI-EAI80_3.JPG\|thumb\|BPI-EAI80 AI board Gree EAI80 chip design]]~~
−	~~[[File:Banana_PI_BPI-EAI80_5.JPG\|thumb\|[[BPI-EAI80 AI board]] Gree EAI80 chip design]]~~
−	~~[[File:BPI-AI_1.JPG\|thumb\|[[BPI-AI]] Kendryte K210 RISC-V]]~~
−	~~[[File:Webduino_gif.gif\|thumb\|[[BPI-Bit]] with ESP32 design ]]~~
−	~~[[File:BPI-K210_1.JPG\|thumb\|[[BPI-K210 RISC-V AIoT board]]]]~~

−	~~BPI-EAI80 board use Edgeless EAI80 chip design .~~
−
−
−	~~=About Edgeless EAI series=~~
−
−	~~EAI series crossover AI MCU, CPU core is based on ARM Cortex-M4, ARMv7-M supports a~~
−	~~predefined 32-bit address space, with subdivision for code, data, and peripherals, and regions for~~
−	~~on-chip and off-chip resources, where on-chip refers to resources that are tightly coupled to the~~
−	~~processor.~~
−	~~EAI is a multi-core microcontroller implementing Dual-ARM Cortex-M4 cores. All cores have~~
−	~~access to the complete memory map. One ARM Cortex-M4 is used as the master processor. The~~
−	~~other ARM Cortex-M4 core can be used as a co-processor to off-load the ARM Cortex-M4 and to~~
−	~~perform complicated mathematical calculations.~~
−	~~CNN processor is integrated in EAI, which can handle image detection and recognition use deep~~
−	~~learning methods with high performance and low energy consumption. It supports mainstream~~
−	~~CNN model such as Resnet-18, Resnet-34, Vgg16, GoogleNet, Lenet etc, convolutional with kernel~~
−	~~size from 1 up to 7, channel/feature number up to 512, max/average pooling function with kernel~~
−
−	~~EAI chip Device Summary~~
−
−	~~[[File:Eai80_chip.png]]~~

← Older revision		Revision as of 03:37, 18 April 2020
Line 5:		Line 5:
	[[File:Webduino_gif.gif\|thumb\|[[BPI-Bit]] with ESP32 design ]]		[[File:Webduino_gif.gif\|thumb\|[[BPI-Bit]] with ESP32 design ]]
	[[File:BPI-K210_1.JPG\|thumb\|[[BPI-K210 RISC-V AIoT board]]]]		[[File:BPI-K210_1.JPG\|thumb\|[[BPI-K210 RISC-V AIoT board]]]]
		+
		+	BPI-EAI80 board use Edgeless EAI80 chip design .

← Older revision		Revision as of 03:35, 18 April 2020
Line 21:		Line 21:
	CNN model such as Resnet-18, Resnet-34, Vgg16, GoogleNet, Lenet etc, convolutional with kernel		CNN model such as Resnet-18, Resnet-34, Vgg16, GoogleNet, Lenet etc, convolutional with kernel
	size from 1 up to 7, channel/feature number up to 512, max/average pooling function with kernel		size from 1 up to 7, channel/feature number up to 512, max/average pooling function with kernel
		+
		+	EAI chip Device Summary
		+
		+	[[File:Eai80_chip.png]]

← Older revision		Revision as of 03:30, 18 April 2020
Line 5:		Line 5:
	[[File:Webduino_gif.gif\|thumb\|[[BPI-Bit]] with ESP32 design ]]		[[File:Webduino_gif.gif\|thumb\|[[BPI-Bit]] with ESP32 design ]]
	[[File:BPI-K210_1.JPG\|thumb\|[[BPI-K210 RISC-V AIoT board]]]]		[[File:BPI-K210_1.JPG\|thumb\|[[BPI-K210 RISC-V AIoT board]]]]
		+
		+
		+	=About Edgeless EAI series=
		+
		+	EAI series crossover AI MCU, CPU core is based on ARM Cortex-M4, ARMv7-M supports a
		+	predefined 32-bit address space, with subdivision for code, data, and peripherals, and regions for
		+	on-chip and off-chip resources, where on-chip refers to resources that are tightly coupled to the
		+	processor.
		+	EAI is a multi-core microcontroller implementing Dual-ARM Cortex-M4 cores. All cores have
		+	access to the complete memory map. One ARM Cortex-M4 is used as the master processor. The
		+	other ARM Cortex-M4 core can be used as a co-processor to off-load the ARM Cortex-M4 and to
		+	perform complicated mathematical calculations.
		+	CNN processor is integrated in EAI, which can handle image detection and recognition use deep
		+	learning methods with high performance and low energy consumption. It supports mainstream
		+	CNN model such as Resnet-18, Resnet-34, Vgg16, GoogleNet, Lenet etc, convolutional with kernel
		+	size from 1 up to 7, channel/feature number up to 512, max/average pooling function with kernel

@@ Line 1: / Line 1: @@
 = Introduction=
 [[File:Banana_PI_BPI-EAI80_3.JPG|thumb|BPI-EAI80 AI board Gree EAI80 chip design]]
-[[File:Banana_PI_BPI-EAI80_5.JPG|thumb|BPI-EAI80 AI board Kendryte K210 RISC-V]]
+[[File:Banana_PI_BPI-EAI80_5.JPG|thumb|[[BPI-EAI80 AI board]] Gree EAI80 chip design]]
 [[File:BPI-AI_1.JPG|thumb|[[BPI-AI]] Kendryte K210 RISC-V]]
 [[File:Webduino_gif.gif|thumb|[[BPI-Bit]] with ESP32 design ]]
 [[File:BPI-K210_1.JPG|thumb|[[BPI-K210 RISC-V AIoT board]]]]

← Older revision		Revision as of 03:03, 18 April 2020
Line 4:		Line 4:
	[[File:BPI-AI_1.JPG\|thumb\|[[BPI-AI]] Kendryte K210 RISC-V]]		[[File:BPI-AI_1.JPG\|thumb\|[[BPI-AI]] Kendryte K210 RISC-V]]
	[[File:Webduino_gif.gif\|thumb\|[[BPI-Bit]] with ESP32 design ]]		[[File:Webduino_gif.gif\|thumb\|[[BPI-Bit]] with ESP32 design ]]
		+	[[File:BPI-K210_1.JPG\|thumb\|[[BPI-K210 RISC-V AIoT board]]]]